


ARTICLE 

Year : 2011  Volume
: 1
 Issue : 1  Page : 3742 

Performance Analysis of Symmetric Multistage Voltage Multipliers
HR Zinage^{1}, SG Gollagi^{2}
^{1} Department of Electrical and Electronics Engineering, Hirasugar Institute of Technology, Nidasoshi  591 236, India ^{2} Department of Computer Science and Engineering, Hirasugar Institute of Technology, Nidasoshi  591 236, India
Date of Web Publication  4Jan2011 
Correspondence Address: H R Zinage Department of Electrical and Electronics Engineering, Hirasugar Institute of Technology, Nidasoshi  591 236 India
Source of Support: None, Conflict of Interest: None  Check 
DOI: 10.4103/09768580.74555
Abstract   
A performance study of a 3phase symmetric CockcroftWalton (CW)multistage voltage multiplier (VM) is proposed. It consists of 1 smoothing column and 6 oscillating columns. The oscillating columns are connected to a 3phase power through centertap transformers. The capacitors of the smoothing column are charged 6 times per cycle by 6 oscillating columns and are discharged 6 times through the load, unlike the conventional symmetric VM in which they are charged and discharged twice per cycle. The 3phase symmetric structure completely eliminates the first 5 harmonic components of loadgenerated voltage ripple. Theoretic analysis indicates that the proposed 3phase symmetric CWVM has onethird the voltage ripple and voltage drop of the conventional singlephase symmetric CWVM. Simulation results of the proposed 3phase symmetric CWVM as well as those of the conventional singlephase symmetric CWVM are presented. A comparison shows that the 3phase symmetric CWVM has significantly less voltage ripple, half the voltage drop, and a 4fold increase in the output power over the conventional singlephase symmetric CWVM. Keywords: Oscillating column, symmetric structure, threephase voltage multiplier, voltage ripple
How to cite this article: Zinage H R, Gollagi S G. Performance Analysis of Symmetric Multistage Voltage Multipliers. J Eng Technol 2011;1:3742 
1. Introduction   
Although CockcroftWalton voltage multiplier (CWVM) circuit was developed long time ago in 1932, it is still widely used in many highvoltage lowcurrent applications, such as lasers, accelerators, ultrahighvoltage electron microscopes, and Xray power generators ^{[1]} . The original CWVM circuit was of halfwave (asymmetric) type and it has large output voltage ripple and voltage drop. A number of modifications of the original CWVM circuit have been proposed and applied to reduce steady state voltage drop and voltage ripple ^{[2]} . However, the circuit asymmetry, especially the asymmetry of the driving voltage may deteriorate the cancellation effect and give rise to the generation of fundamental and higher order odd harmonic of ripple. The fundamental harmonic of ripples increases with the increase in the asymmetry of driving voltage and in the case of low load current it may dominate over the second harmonic. This is due to the reason that at lower load current the peaktopeak value of loadgenerated second harmonic of ripples would be smaller than the fundamental harmonic. The fundamental harmonic component was found to be dominant in some lower load current applications, such as some electron microscopes and accelerators. Similarly the fundamental harmonics also affects the quality of output laser beam of continuous wave carbon dioxide gas laser ^{[1],[2],[3]} . Some applications, such as ultrahighvoltage electron microscopes, require high stability of the high DC voltage. Such stability is difficult to achieve directly by the singlephase asymmetrical CWVM ^{[4],[5]} . To overcome the problem of asymmetry of driving voltage and to get output voltage free from fundamental and higher order odd harmonics, we have proposed symmetrical CWVM ^{[6]} . The proposed CWVM has an intrinsic ability to cancel the fundamental and odd harmonic of ripples caused by the driving voltage. In addition to this the proposed voltage multiplier has many advantages over the original CWVM circuit which is of halfwave (asymmetric) type. These include smaller size, light weight, less component counts, easier implementation, faster transient response, and smaller voltage drop.
A symmetrical CWVM, which is an improved form of original CWVM, is presently more popular and is widely used in most of the abovementioned application ^{[7]} . It has significantly smaller output voltage ripple and voltage drop as compared to original CWVM ^{[8],[9]} . This is because the symmetrical structure of symmetrical CWVM cancels out the fundamental harmonic of ripples caused by driving voltage and stray capacitance ^{[10]} . Thus the loadgenerated second order harmonic is the major ripple component in the DC output of the symmetric CWVM. The second and higher order even harmonics of ripples are proportional to load current and can be minimized by choosing larger size of smoothing column capacitors ^{[11],[12]} .
A 3phase symmetric CWVM is proposed to improve the stability of the output voltage. The proposed 3phase VM consists of 1 smoothing column and 6 oscillating columns. The charging and discharging of the smoothing column's capacitors completes six times a cycle as compared with the conventional singlephase symmetrical CWCM in which the capacitors are charged and discharged twice per cycle ^{[5]} . The proposed 3phase symmetric CWVM has been shown to have a much better performance than the conventional singlephase symmetric voltage multiplier. It has significantly less voltage ripple, half the voltage drop and approximately a fourfold increase in power output over a conventional symmetrical CWVM ^{[13],[14]} Simulation results are presented to verify the effectiveness of the proposed 3phase symmetric CWVM.
2. Circuit Description and Principle of Operation   
[Figure 1] shows a 3phase symmetric CWVM circuit, which consists of 6 oscillating (AC) columns and one smoothing column. Phase a is V _{a} (V′_{a} , V′′_{a} ): (C _{1a}′, C _{2a}′  C _{na}′) and (C _{1a}′′, C _{2a}′′  C _{na}′′); Phase b is V _{b} (V _{b}′, V _{b}′′): (C _{1b}′, C _{2b}′  C _{nb}′) and (C _{1b}′′, C _{2b}′′  C _{nb}′′); Phase c is V _{c} (V′_{c} ,V′′_{c} ): (C _{1c}′, C _{2c}′  C _{nc}′) and (C _{1c}′′, C _{2c}′′  C _{nc}′′). Smoothing column (C _{1} , C _{2} , C _{n} ) is common to all the oscillating columns. Phase a is connected to AC voltage source V _{a} = V _{a} (t) = V1sinwt; Phase b to V _{b} = V _{b} (t) = V2sin(wt120°); and Phase c to V _{c} = V _{c} (t)=V _{3} sin(wt240°); through highfrequency centertap transformers T _{1} , T _{2} , and T _{3} , respectively. If R _{L} = ∞, the capacitors of the smoothing column remain fully charged and none of the rectifiers conducts. However, if RL≠ ∞, then the capacitors of the smoothing column discharge due to load current and are recharged to peak value by the oscillating columns. Each of the 6 oscillating columns charges the smoothing column to peak value once in every cycle (ie, each phase charges the smoothing column twice every cycle).  Figure 1: Proposed nstage 3phase symmetric Cockcroft– Walton voltage multiplier
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[Figure 2] shows the 6 charging intervals t _{1} t _{6} and 6 discharging intervals t _{d1} t _{d6} in each complete cycle. Capacitors of the smoothing column charge to peak value 6 times every cycle through the oscillating columns and discharge through the load. There are 6 different charging modes. In each mode the smoothing column is connected to only 1 phase, and the other 2 are disconnected by the reverse biasing of the respective diodes. These 6 charging modes are presented here.  Figure 2: Key waveforms of 3phase symmetric voltage multiplier in steady state operation
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2.1 Modes of Operation
0A. Mode 1 ( t _{1} )
Voltage V′′_{b} (t) approaches positive peak value, while voltage V′_{b} (t) approaches negative peak value. The capacitors of oscillating column (C _{1b}″, C _{2b}′′  C _{nb}′′) transfer charge through diodes (D _{1b}′, D _{2b}′  D _{nb}′) and (D _{1b}″″, D _{2b}″″  D _{nb}″″) to the oscillating column capacitors (C _{1b}′, C _{2b}′  C _{nb}′) and the smoothing column capacitors, respectively.
B. Mode 2 ( t _{2} )
Voltages V′_{a} (t) and V′′_{a} (t) approach positive and negative peak values, respectively. Oscillating column capacitors (C _{1a}′, C _{2a}′  C _{na}′) transfer charge to oscillating column (C _{1a}′′, C _{2a}′′  C _{na}′′) and to smoothing column (C _{1} , C _{2} ,  C _{n} ) through diodes (D _{1a}′′, D _{2a}′′  D _{na}′′) and (D _{1a}′′′, D _{2a}′′′ … D _{na}′′′), respectively.
C. Mode 3 ( t _{3} )
Voltages V′′_{c} (t) and V′_{c} (t) approach positive and negative peak values, respectively. During this mode the charging current flows from oscillating column (C _{1c}′′¬, C _{2c}′′… C _{nc}′′) to oscillating column (C _{1c}′¬, C _{2c}′ … C _{nc}′) and to smoothing column (C _{1} , C _{2} …C _{n} ), through diodes (D _{1c}′¬, D _{2c}′… D _{nc}′) and (D _{1c}′′′′,D _{2c}′′′′…D _{nc}′′′′) respectively.
D. Mode 4 ( t _{4} )
Voltages V′_{b} (t) and V′′_{b} (t) approach positive and negative peak values, respectively. Charging current flows from oscillating column to (C _{1b}′, C _{2b}′  C _{nb}′) oscillating column (C _{1b}′′_{} , C _{2b}′′  C _{nb}′′) and to smoothing column (C _{1} , C _{2} , C _{n} ), through diodes (D _{1b}′′′_{} , D _{2b}′′′ D _{nb}′′′) and (D _{1b}′′, D _{2b}′′  D _{nb}′′) respectively.
E. Mode 5 ( t _{5} )
Voltages V′′_{a} (t) and V′_{a} (t) approach positive and negative peak values respectively. Charging current flows from oscillating column (C _{1a}′′, C _{2a}′′  C _{na}′′) to oscillating column (C _{1a}′, C _{2a}′  C _{na}′) and to smoothing column (C1, C2,Cn), through diodes (D _{1a}′, D _{2a}′,, D _{na}′) and (D _{1a}′′′′, D _{2a}′′′′ D _{na}′′′′), respectively.
F. Mode 6 ( t _{6} )
Voltages V′_{c} (t) and V′′_{c} (t) approach positive and negative peak values, respectively. Charging current flows from oscillating column (C _{1c}′, C _{2c}′ C _{nc}′) to oscillating column (C _{1c}′′_{} , C _{2c}′′  C _{nc}′′) and to smoothing column ( C _{1} ,C _{2} ,C _{n} ) through diodes (D _{1c}′′_{} , D _{2c}′′  D _{nc}′′) and (D _{1c}′′′, D _{2c}′′′ D _{nc}′′′), respectively.
Here simulation results are presented to verify the effectiveness of the proposed 3phase symmetric CWVM [Figure 3],[Figure 4],[Figure 5],[Figure 6],[Figure 7],[Figure 8],[Figure 9],[Figure 10],[Figure 11],[Figure 12]. The performance of the proposed single and 3phase CWVMs are evaluated on the basis of computer simulation/SIMULINK. The 3phase AC voltage can be obtained by connecting 3 singlephase highfrequency, highvoltage sources in parallel and delaying input signals by 120° with respect to each other. Following are the specifications of the simulation circuits. The frequency of the 3phase driving voltage (ie, V _{a} , V _{b} , V _{c} ) is 17 kHz; 10 nF capacitors are used in the VM circuits; the turns ratio of the centertap transformers is 1:1:1; the magnitude of input voltages V′_{a} , V′′_{a} , V′_{b} , V′′_{b} , and V′_{c} , V′′_{c} are 5 kV for the simulation circuits with resistive load of 10 kΩ.  Figure 3: Input voltage waveform of Singlephase symmetric voltage multiplier (Magnitude of input voltage = 5 kV)
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 Figure 4: Simulated output voltage waveform of Singlephase symmetric voltage multiplier
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 Figure 5: Simulated output current waveform of Singlephase symmetric voltage multiplier
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 Figure 6: Simulated voltage waveforms (ripple content in the output voltage) of Singlephase symmetric voltage multiplier
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 Figure 7: Simulated current waveform (ripple content in the output current) of Singlephase symmetric voltage multiplier
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 Figure 8: Input voltage waveform of 3phase symmetric voltage multiplier (Magnitude of input voltages = 5 kV)
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 Figure 9: Simulated output voltage waveform of 3phase symmetric voltage multiplier
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 Figure 10: Simulated output current waveform of 3phase symmetric voltage multiplier
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 Figure 11: Simulated voltage waveform (Ripple content in the output voltage) of 3phase symmetric voltage multiplier
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 Figure 12: Simulated current waveforms (Ripple content in the output current) of 3phase symmetric voltage multiplier
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[Table 1] and [Table 2] compare the output voltage, output current, voltage ripple, current ripple, and Total Harmonic Distortion (THD) of the symmetric 3phase, 3stage CWVM with the corresponding values for the symmetric singlephase, 3stage CWVM with an ideal voltage source, that is, R = 0 and L = 0. The comparison results show that for given 5 kV, 17 kHz input supply, the output voltage and output current of 3phase voltage multiplier is higher than that of a singlephase voltage multiplier. The ripple content in the output voltage and current of a 3phase voltage multiplier is nearly onethird of that of a singlephase voltage multiplier. The THD of the symmetric 3phase voltage multiplier is also less than that of a singlephase voltage multiplier. Hence the proposed 3phase symmetric CWVM has been shown to have much better performance than the singlephase symmetric voltage multiplier.
[Table 3] and [Table 4] compare the output voltage, output current, voltage ripple, current ripple, and THD of the symmetric 3phase, 3stage CWVM with the corresponding values for the symmetric singlephase, 3stage CWVM multiplier with practical voltage source, that is, R = 0 and L = 1 mH. The comparison results show that for given 5 kV, 17 kHz input supply, output voltage and output current of 3phase voltage multiplier is higher than that of a singlephase voltage multiplier. The ripple content in the output voltage and current of 3phase voltage multiplier is significantly less than that of a singlephase voltage multiplier. The THD of the symmetric 3phase voltage multiplier is also less than that of a singlephase voltage multiplier. Hence it is clear from the simulation results that the 3phase VM has twice the output voltage and considerably less ripple than the singlephase VM. Thus the output power of the 3phase VM is approximately 4 times larger than the singlephase voltage multiplier (as P = V2 /R). Simulated input voltage, load voltage, and load current waveforms in steady state for both 3phase and singlephase symmetric VMs are also obtained for different stages. The 3phase VM load current ripple's frequency is of the sixth order of the drive signal frequency, thereby proving that the charging and discharging process of the smoothing column completes 6 times in a drive signal cycle. Thus the sixth harmonic is the most significant ripple component, and the first 5 harmonics are canceled by the 3phase symmetric structure of the voltage multiplier.  Table 1: Comparison between single and 3phase symmetric voltage multiplier circuit with 5 kV, 17 kHz input supply and 10 kÙ load resistance for 3 stages (fed by an ideal voltage source, i.e. R = 0 and L = 0)
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 Table 2: Comparison between single and 3phase symmetric voltage Multiplier circuit with 5 kV, 17 kHz input supply and 10 kÙ load resistance for 2 stages (fed by an ideal voltage source i.e. R = 0 and L = 0)
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 Table 3: Comparison between single and 3phase Symmetric voltage Multiplier circuit with 5 kV, 17 kHz input supply and 10 kÙ load resistance for 3 stages (With Associated voltage source inductance i.e. R = 0 and L = 1 mH)
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 Table 4: Comparison between singlephase and 3phase symmetric voltage multiplier circuit with 5 kV, 17 kHz input supply, and 10 kÙ load resistance for 2 stages (with associated voltage source inductance = 0 and L = 1 mH)
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4. Conclusion   
A 3phase symmetric CWVM is proposed to improve the stability of the output voltage. The proposed 3phase symmetric CWVM has been shown to have much better performance than the conventional singlephase symmetric voltage multiplier. It has significantly less voltage ripple, half the voltage drop, and approximately a 4fold increase in power output over a conventional symmetric CWVM. Simulation results of the proposed 3phase symmetric CWVM as well as of the conventional singlephase symmetric CWVM are presented with and without source inductance.
References   
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Authors   
Prof (Mrs). H. R. Zinage obtained her BE (E and EE) and M.Tech. (Power systems) from Karnataka University, Dharawad, and Shivaji University, Kolhapur, INDIA, respectively. She is life member of ISTE. She is presently working as a Senior Lecturer in Electrical and Electronics Engineering department. Her research interests include AI applications to Power systems and Electrical Harmonics. She has published 2 papers in International Journals and 3 papers in Conferences.
Prof. S. G. Gollagi obtained his BE (CSE) and M.Tech. (Computer Engineering) from Karnataka University, Dharawad, and University of Pune, INDIA, respectively. He is life member of ISTE. He is presently working in HIRASUGAR INSTITUTE OF TECHNOLOGY, NIDASOSHI, INDIA, as Assistant Professor. His research interest includes Security in Wireless Network, AI application to power system, Algorithms, and Image processing. He has published 4 papers in International Journals and 5 papers in Conferences.
[Figure 1], [Figure 2], [Figure 3], [Figure 4], [Figure 5], [Figure 6], [Figure 7], [Figure 8], [Figure 9], [Figure 10], [Figure 11], [Figure 12]
[Table 1], [Table 2], [Table 3], [Table 4]
