Journal of Engineering and Technology

ARTICLE
Year
: 2015  |  Volume : 5  |  Issue : 1  |  Page : 41--44

Triple Single Slope and Dual Slope Frequency to Voltage Converter Circuits


Krishnagiri Chinnathambi Selvam 
 Department of Electrical Engineering, Indian Institute of Technology, Chennai, Tamil Nadu, India

Correspondence Address:
Krishnagiri Chinnathambi Selvam
Department of Electrical Engineering, Indian Institute of Technology, Chennai, Tamil Nadu
India

Abstract

A sinusoidal frequency to voltage converters using op-amp based triple integrators, dual comparator and dual peak detectors, is explained in this paper. The output DC voltage is linearly proportional to the sinusoidal input frequency. The proportional constant is the product values of a resistor, a capacitor and a reference DC voltage. By employing precision values for these three quantities, an acceptable level of accuracy can be achieved. Verification of feasibility of the circuit is established by way of test results.



How to cite this article:
Selvam KC. Triple Single Slope and Dual Slope Frequency to Voltage Converter Circuits.J Eng Technol 2015;5:41-44


How to cite this URL:
Selvam KC. Triple Single Slope and Dual Slope Frequency to Voltage Converter Circuits. J Eng Technol [serial online] 2015 [cited 2020 Aug 6 ];5:41-44
Available from: http://www.onlinejet.net/text.asp?2015/5/1/41/149485


Full Text

 I. Introduction



Frequency to voltage converter (FVC) has many applications in power control, communications, instrumentation and measurement systems, etc. Lin and Hou [1] employed current conveyors, up-down counter and ultra-high speed D/A converter to achieve fast FVC. Djemousai et al. [2] proposed a FVC circuit which was composed of two equal capacitors, a current source, a set of transistors that act as switches and a logic controller block. A sinusoidal FVC [3] was realized with a differentiator, an integrator, a divider and square rooter circuits. Laopoulos and Karybakas [4] considered the operation of FVC as a two-phase procedure of input frequency measurement and output voltage value calculation. Shin and Cho [5] employed a direct period calculation method using an analogue circuit. Counting the number of input pulses over a fixed period of time is given in [6] . The most popular methods are based on low-pass filtering of fixed duration pulses at a rate of input signal frequency [7] . Triple single and dual slope f-to-V converters using op-amp based triple integrators, dual comparators and dual peak detectors, are described in this paper.

 2. Triple Single Slope Frequency To Voltage Converter



The circuit diagram of the proposed FVC is shown in [Figure 1] and its associated waveforms in [Figure 2] and [Figure 3]. The input sine wave f I is converted into square wave V P by the comparator OA 1 . The square wave V P controls the integrator OA 2 through the switch S 1 . The switch S 1 shorts capacitor C 1 during positive half cycles of input frequency. During its negative half cycle, the switch S 1 opens and the integrator OA 2 output will be:{Figure 1}{Figure 2}{Figure 3}

[INLINE:1]

A negative going semi saw tooth wave is obtained at the output of the integrator OA 2 with a peak value of V X . From [Figure 2] and Eq. 1 at t = T I /2, V S1 = V X .

[INLINE:2]

The peak detector PD1 gives the peak value V X, which is proportional to the input time period T I . A saw tooth waveform of period T and peak value of V R is generated by the op-amps OA 3 , OA 4 and switch S 3 . The op-amp OA 3 as an integrator forces the feedback capacitor C 3 to charge at a rate set by the input current whose value is V X /R 3 . During capacitor charge, the comparator OA 4 output is at LOW state and switch S 3 is in OFF state. The output of the integrator V s3 is then:

[INLINE:3]

When the output of the integrator OA 3 exceeds the reference voltage V R , the comparator OA 4 output goes high and the switch S 3 shorts the capacitor C 3 , hence V s3 comes down to OV. After a very short delay time T d , the comparator output returns to LOW and the switch S 3 opens allowing C 3 to resume charging. The cycle, therefore, repeats itself at a period (T + T d ). The waveforms at cardinal points in the circuit are shown in [Figure 3]. From the waveforms shown in [Figure 3], Eq. 3 and the fact that at time t = T, V s3 = V R , we get:

[INLINE:4]

It should be noted here that the integration was done over the period T. The actual period is T + T d , since T d << T, it can be neglected with negligible errors in the end result. The reference voltage V R is given to another integrator OA 5 . The output of integrator OA 5 is given by:

[INLINE:5]

A negative going saw tooth wave V S2 is generated at the output of the integrator OA 5 with the same time period T and a peak value of Vo. From the waveforms shown in Figure and equation and the fact that at time t = T, V s2 = V O , we get:

[INLINE:6]

If R 2 = R 3, C 2 = C 3 and V R = 1V then

[INLINE:7]

The peak detector at the output of the integrator OA 5 gives this peak value V O .

 3. Triple Dual Slope Frequency To Voltage Converter



The circuit diagram of the proposed f-to-V converter is shown in [Figure 4] and its associated waveforms in [Figure 5] and [Figure 6]. The input sinusoidal waveform f IN is converted in to a square waveform V P by zero crossing detector using non-inverting op-amp comparator OA 1 . This V P controls the switch S 1 . During ON time of V P the switch S 1 connects −V T and during OFF time of V P the switch S 1 connects +V T to the integrator OA 2 , where V T is the reference voltage. During ON time of V P (i.e., during the positive half cycle of input frequency), the integrator OA 2 output will be: {Figure 4}{Figure 5}{Figure 6}

[INLINE:8]

During OFF time of V P (i.e. during the negative half cycle of input frequency), the integrator OA2 output will be:

[INLINE:9]

As shown in [Figure 2] a triangle waveform with a peak to peak, voltage of ±V X is generated at the output of OA 2 . From the waveforms shown in [Figure 2] and from Eq. 1, at t = T IN /2, V S1 = 2V X :

[INLINE:10]

The peak detector PD1 gives this V X . Let us assume that initially the comparator OA 4 output voltage V C is at +V CC , where ±V CC is the power supply voltage to the circuit.

This connects +V X to the integrator OA 3 . Whenever integrator output reaches lower transition voltage −V R with charging current of +V X /R 2, the comparator output will change its output to −V CC and the switch connects −V X to the integrator OA 3, when the integrator output reaches upper transition voltage +V R with charging current of −V X /R 2 the comparator output will change its output to +V CC and the switch connects +V X to the integrator OA 3. This sequence, therefore, repeats to give a triangular wave with ±V R as peak values at the output of integrator OA 3 and a square wave at the output of OA 4. When the comparator output is +V CC and the input to the integrator is +V X , the effective voltage at point "P" is given by:

[INLINE:11]

When the effective voltage at P becomes 0V, we can write the above equation as:

[INLINE:12]

From Eq. 5 we can get the transition voltages:

[INLINE:13]

The integrator OA 2 output V P for one transition that is, when −V X is at its input will be:

[INLINE:14]

From the waveform shown in [Figure 3] and the fact that at t O1 = T O /2, V S2 = 2V R , we get:

[INLINE:15]

The square waveform f O generated at the output of OA 4 converted into a triangular wave with a peak to the peak value of V O . During ON time of T O , the integrator OA 5 output will be:

[INLINE:16]

During OFF time of T O , the integrator OA 5 output will be:

[INLINE:17]

From the above equation and [Figure 3] at t = T O /2, V S3 = 2V O :

[INLINE:18]

Let 4R 2 C 2 = 4R 5 C 3 and V R = V T , Peak detector PD2 output is:

[INLINE:19]

 4. Experimental Results and Conclusion



The proposed circuit shown in [Figure 1] is tested in our laboratory. Lf 356 ICs were used for all opamps. A ± 7.5V is used for power supply. 2R 1 C 1 time constant is selected such that for maximum output voltage V O = 5V for maximum frequency of 5KHZ. The test results are shown in [Figure 4]a.

The proposed circuit shown in [Figure 4] is tested in our laboratory. Lf 356 ICs were used for all opamps. A ± 7.5V is used for power supply. 4R 1 C 1 time constant is chosen such that for maximum output voltage V O = 5V for maximum input frequency of 500HZ. The test results are shown in [Figure 4]b.

 5. Acknowledgement



The author is indebted to his loving wife Mrs. S. Latha for circuit drawing, waveforms drawing, proof readings and discussions. He also thanks Prof. Dr. V. Jagadeesh Kumar, Prof. Dr. Harishankar Ramachandran, Prof. Dr. Sridharan, Dr. Arun Mahindrakar, Dr. Bharath Bhikkaji and Dr. Ramakrishna Pasumarthy, Department of Electrical Engineering, Indian Institute of Technology, Madras, for their encouragement throughout the work.

References

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2A. Djemousai, M. Sawan, and M. Slamani, "High Performance Integrated CMOS Frequency to Voltage Converter," ICM; pp. 63-66, 1998.
3S. Wanlop, C. Yongyut, and B. Suree, "An analog sinusoidal frequency to voltage converter," IEEE Tranactions on Instrumentation and Measurement, Vol. 40, no.6, pp. 925-929, 1991.
4T. L. Laopoulos, and C. A. Karybakas, "High performance Frequency-to-voltage converter," International Journal of Electronics, Vol. 68, no. 2, pp. 303-307, 1990.
5D. H. Shin, and G. H. Cho, "A simple high performance analog frequency to voltage converter," IEEE Tranactions on Industrial Electronics, Vol. IE-34, pp. 295-298, 1987.
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